MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 397

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

11.7.5 L-Bus Read Show Cycle Flow
11.7.6 Show Cycle Support Guidelines
MPC555
USER’S MANUAL
The L2U performs the following sequence of actions for an L-bus read show cycle.
The following are the guidelines for L2U show cycle support:
Table 11-4
1. Arbitrates for the L-bus to prevent any other L-bus cycle from starting
2. Latches the address of the L-bus access, along with all address attributes
3. Waits for the data phase termination on the L-bus and latch the read data, and
4. Arbitrate for the U-bus, and when granted, starts the U-bus access, asserting
5. When the L2U module has U-bus data bus grant, it drives the read data and the
6. Release the L-bus.
• The L2U module provides address and data for all qualifying L-bus cycles when
• The L2U-module-only show cycles L-bus activity that is not targeted for the U-bus
• The L2U module does not show cycle any access to a PowerPC special purpose
• The L2U does not start a show cycle for an L-bus access that is retried. This de-
• The L2U module does not show cycle any L-bus activity that is aborted.
• The L2U module backs off the U-bus if the USIU inhibits show cycle activity on
• The L2U does not show cycle any L-bus addresses that fall in the L-bus SRAM
/
the appropriate mode bits are set in the L2U_MCR.
or the L2U module internal registers, irrespective of the termination status of such
activity.
register.
cision to not start the show cycle causes a clock delay before the cycle can be
retried, since the L2U module will have arbitrated away the L-bus immediately on
detecting the show cycle, before the retry information is available.
the U-bus.
address space if the SRAM Protection [SP] bit is set in the L2U_MCR.
MPC556
the termination status from the L-bus
the show cycle request on the U-bus, along with address attributes. The L2U
module provides address recognize/acknowledgment for the address phase. If
the no-show cycle indicator from the U-bus is asserted, the L2U does not start
the show cycle. The L2U module releases the U-bus until the no-show cycle in-
dicator is negated and then arbitrates for the U-bus again.
data phase termination handshakes on the U-bus
summarizes the L2U show cycle support.
L-BUS TO U-BUS INTERFACE (L2U)
Rev. 15 October 2000
MOTOROLA
11-11