MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 813

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MPC555 / MPC556
USER’S MANUAL
MPWMSMCNTR (MPWMSM counter register) 15-28
MPWMSMPERR (MPWMSM period register) 15-27
MPWMSMPULR (MPWMSM pulse width register) 15-27
MPWMSMSCR (MPWMSM status/control register) 15-28
MSR (machine state register) 3-20
MSTAT (memory controller status register) 10-28
OR0 (OR3 - memory controller option registers 0 - 3) 10-30
PDMCR (Pad module configuration register) 2-29
PISCR (periodic interrupt status and control register) 6-32
PITC (periodic interrupt timer count) 6-32
PITR (periodic interrupt timer register) 6-33
PLPRCR (PLL, low power, and reset control register) 8-33
PORTQA (port QA data register) 13-34
PORTQB (port QB data register) 13-34
PORTQS (port QS data register) 14-11
PQSPAR (PORTQS pin assignment register) 14-11
PRESDIV (prescaler divide register) 16-27
PVR (processor version register) 3-25
QACR0 (QADC64 control register 0) 13-35
QACR1 (QADC64 control register 1) 13-36
QACR2 (QADC64 control register 2) 13-39
QADC64INT (QADC64 interrupt register) 13-33
QADC64MCR (QADC64 module configuration register) 13-33
QASR0 (QADC64 status register 0) 13-41, 13-42
QDSCI_IL (QSM2 dual SCI interrupt level register) 14-8
QSCI1CR (QSCI1 control register) 14-59
QSCI1SR (QSCI1 status register) 14-61
QSMCMMCR (QSMCM module configuration register) 14-7
QSPI_IL (QSPI interrupt level register) 14-9
RAMBAR (ram array base address register) 18-5
Regionattribute registers (0 - 3) 4-21
RJURR (right justified, unsigned result register) 13-49
RSR (reset status register) 7-5
RTC (real time clock) 6-31
RTCAL (real time clock alarm) 6-31
RTCSC (real time clock status and control register) 6-30
RXECTR (receive error counter) 16-33
RXGMSKHI (receive global mask register high) 16-29
SCCR (system clock control register) 8-30
SCCxR0 (QSMCM SCI control register 0) 14-45
SCCxR1 (QSMCM SCI control register 1) 14-46
SCDR (QSMCM SCI data register) 14-49
SCxSR (QSMCM SCIx status register) 14-47
SGPIOCR (SGPIO control register) 6-35
SGPIODT1 (SGPIO data register 1) 6-34
SGPIODT2 (SGPIO data register 2) 6-34
SIEL (SIU interrupt edge level register) 6-25
SIMASK (SIU interrupt mask register) 6-24
REGISTER DIAGRAM INDEX
Rev. 15 October 2000
–O–
–Q–
–P–
–R–
–S–
MOTOROLA
C-3