MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 398

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
11.8 L2U Programming Model
MPC555
USER’S MANUAL
L2U_RBA0
L2U_RBA1
L2U_RBA2
L2U_RBA3
L2U_MCR
L2U_GRA
L2U_RA0
L2U_RA1
L2U_RA2
L2U_RA3
Name
1. L-bus slave includes all address in the L-bus address space.
2. L2U indicates L2U registers.
3. U-bus/E-bus refers to all destinations through the L2U interface.
4. There will be a 1-clock turnaround because the L-bus retry information is not available in time to negate the L-
Note: X indicates don’t care conditions.
The L2U control registers control the L2U bus interface and the DMPU. They are ac-
cessible via the MPC555 / MPC556 mtspr and mfspr instructions. They are also ac-
cessible by an external master when EMCR[CONT] bit is cleared. L2U control
registers are accessible from both the L-bus side and the U-bus side in one clock cy-
cle. As with all SPRs, L2U registers are accessible in supervisor mode only.
Any unimplemented bits in L2U registers return 0’s on a read, and the writes to those
register bits are ignored.
The
addresses which are used to access L2U registers during a peripheral mode access.
bus arbitration.
Case
Table 11-5
/
1
2
3
4
5
MPC556
SPR #
568
792
793
794
795
824
825
826
827
536
U-bus/E-bus
Destination
L-bus Slave
L-bus slave
L-bus slave
L2U
SPR5:9
shows L2U registers along with their SPR numbers and hexadecimal
10001
11000
11000
11000
11000
11001
11001
11001
11001
10000
Table 11-4 L2U Show Cycle Support Chart
2
Table 11-5 L2U (PPC) Register Decode
1
3
L-BUS TO U-BUS INTERFACE (L2U)
SPR0:4
11000
11000
11001
11010
11011
11000
11001
11010
11011
11000
LB AACK
Yes
Yes
No
X
X
Rev. 15 October 2000
External Master
0x0000_3110
0x0000_3180
0x0000_3380
0x0000_3580
0x0000_3780
0x0000_3190
0x0000_3390
0x0000_3590
0x0000_3790
0x0000_3100
Address for
Access
LB ABORT
Yes
.
No
X
X
X
Access
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
[Cycle will be retried one clock later]
[L-bus will be released next clock]
Not show cycled
Not show cycled
Not show cycled
Not show cycled
L2U Module Configuration Register
Region Base Address Register 0
Region Base Address Register 1
Region Base Address Register 2
Region Base Address Register 3
Comments
Show cycled
Region Attribute Register 0
Region Attribute Register 1
Region Attribute Register 2
Region Attribute Register 3
Global Region Attribute
Description
MOTOROLA
4
11-12

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