MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 701

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
21.2.3 Sequential Instructions Marked as Indirect Branch
21.2.4 The External Hardware
21.2.4.1 Synchronizing the Trace Window to the CPU Internal Events
MPC555
USER’S MANUAL
cases the first instruction fetch after debug mode is marked with the program trace cy-
cle attribute and therefore is visible externally.
There are cases when non-branch (sequential) instructions may effect the machine in
a manner similar to indirect branch instructions. These instructions include rfi, mtmsr,
isync and mtspr to CMPA-F, ICTRL, ECR and DER.
These instructions are marked by the CPU as indirect branch instructions (VF = 101)
and the following instruction address is marked with the same program trace cycle at-
tribute as if it were an indirect branch target. Therefore, when one of these special in-
structions is detected in the CPU, the address of the following instruction is visible
externally. In this way the reconstructing software is able to evaluate correctly the ef-
fect of these instructions.
When program trace is needed, the external hardware needs to sample the status pins
(VF and VFLS) each clock cycle and the address of all cycles marked with the program
trace cycle attribute.
Program trace can be used in various ways. Below are two examples of how program
trace can be used:
The assertion/negation of VSYNC is done using the serial interface implemented in the
development port. In order to synchronize the assertion/negation of VSYNC to an in-
• Back trace — Back trace is useful when a record of the program trace before
• Window trace — Window trace is useful when a record of the program trace be-
/
some event occurred is needed. An example of such an event is some system
failure.
In case back trace is needed the external hardware should start sampling the sta-
tus pins (VF and VFLS) and the address of all cycles marked with the program
trace cycle attribute immediately when reset is negated. If show cycles is pro-
grammed out of reset to show all, all cycles marked with program trace cycle at-
tribute are visible on the external bus. VSYNC should be asserted sometime after
reset and negated when the programmed event occurs. If no show is pro-
grammed for show cycles, make sure VSYNC is asserted before the Instruction
show cycles programming is changed from show all.
Note that in case the timing of the programmed event is unknown it is possible to
use cyclic buffers.
After VSYNC is negated the trace buffer will contain the program flow trace of the
program executed before the programmed event occurred.
tween two events is needed. In case window trace is needed the VSYNC pin
should be asserted between these two events.
After the VSYNC pin is negated the trace buffer will contain information describing
the program trace of the program executed between the two events.
MPC556
DEVELOPMENT SUPPORT
Rev. 15 October 2000
MOTOROLA
21-5

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