MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 90

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.4.7 Special Pull Resistor Disable Control (SPRDS)
2.4.8 Pin Reset States
MPC555
USER’S MANUAL
IRQ[0]/SGPIOC[0]
For the pins that support debug and opcode-tracking functionality, the pull-up and pull-
down resistors are controlled by the SPRDS signal, which is somewhat like the encod-
ed 3-V / 5-V select. During reset this signal is used synchronously to enable the pull-
up resistors in the pads. On negation of reset, based on which functionality is selected
for the pins, this signal is set to disable the pull-up resistors or remains held in its reset
state to indicate that the pull-ups are disabled only when the output driver is enabled.
For example, if a pin is configured as a bus arbitration pin, The SPRDS signal remains
low throughout reset. This causes the pull-up to be enabled. When reset is released,
SPRDS remains low. The output enable for the driver is negated by default. When the
output driver is enabled, the pull-up is disabled.
When a pin is configured as an opcode-tracking or debug pin, SPRDS remains low
throughout reset. This causes the pull-up to be enabled. When reset is released,
SPRDS is asserted. This disables the pull-up resistor immediately. The output driver
drives the pin to the required state after reset.
Table 2-4
RSV/SGPIOC[1]
CR/SGPIOC[2]/
SGPIOA[8:31]
SGPIOD[0:31]
ADDR[8:31]/
KR, RETRY/
DATA[0:31]/
SGPIOC[3]
SGPIOC[4]
IRQ[1]/
IRQ[2]/
IRQ[3]/
IRQ[4]/
AT[2]/
MTS
/
Pin
MPC556
summarizes the reset states of all the pins on the MPC555 / MPC556.
Function
SGPIOD[0:31]
SGPIOA[8:31]
ADDR[8:31]
KR, RETRY
DATA[0:31]
SGPIOC[0]
SGPIOC[1]
SGPIOC[2]
SGPIOC[3]
SGPIOC[4]
IRQ[0]
IRQ[1]
IRQ[2]
IRQ[3]
IRQ[4]
AT[2]
RSV
MTS
CR
Table 2-4 Pin Reset State
SIGNAL DESCRIPTIONS
Rev. 15 October 2000
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
Port
O
O
O
I
I
I
I
I
I
USIU
Voltage
3 V
5 V
3 V
5 V
3 V
5 V
3 V
3 V
5 V
3 V
3 V
5 V
3 V
3 V
3 V
5 V
3 V
3 V
5 V
PU5 until reset negates
PU5 until PRDS is set
PD until reset negates
PD until PRDS is set
PU5 until reset negates
PU5 until PRDS is set
PU5 until reset negates
PU5 until reset negates
PU5 until PRDS is set
PU5 until reset negates
PU5 until reset negates
PU5 until PRDS is set
PU5 until PRDS negates
PU5 until reset negates
PU5 when driver not enabled
PU5 until PRDS is set
PU5 until reset negates
PU5 until reset negates
PU5 until PRDS is set
Reset State
1
1
1
1
1
1
1
1
1
2
MOTOROLA
2-32