MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 473

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PORTQS — Port QS Data Register
PQSPAR — PORTQS Pin Assignment Register
14.6.2 PORTQS Pin Assignment Register (PQSPAR)
MPC555
USER’S MANUAL
RESET:
RESET:
MSB
MSB
0
0
0
0
0
PQSPAR determines which of the QSPI pins, with the exception of the SCK pin, are
used by the QSPI submodule, and which pins are available for general-purpose I/O.
Pins may be assigned on a pin-by-pin basis. If the QSPI is disabled, the SCK pin is
automatically assigned its general-purpose I/O function (QGPIO6).
QSPI pins designated by PQSPAR as general-purpose I/O pins are controlled only by
PQSDDR and PQSPDR; the QSPI has no effect on these pins. PQSPAR does not af-
fect the operation of the SCI submodule.
Table 14-9
*See bit descriptions in
QPAP
RESERVED
CS3
/
1
0
1
0
MPC556
QPAP
CS2
2
0
2
0
summarizes the QSMCM pin functions.
QPAP
CS1
3
0
3
0
Table
QDRX
QPAP
QUEUED SERIAL MULTI-CHANNEL MODULE
CS0
D2
4
0
4
0
14-11.
Table 14-9 QSMCM Pin Functions
PORTQS Function
QDTX
D2
5
1
5
0
0
QGPIO6
QGPIO5
QGPIO4
QGPIO3
QGPIO2
QGPIO1
QGPIO0
QGPO2
QGPO1
QGPI2
QGPI1
QDRX
Rev. 15 October 2000
MOSI
QPA-
D1
6
0
6
0
QPAM
QDTX
ISO
D1
7
1
7
0
QSMCM Function
8
0
0
8
PCS[3]
PCS[2]
PCS[1]
PCS[0]
RXD2
RXD1
QDPC
TXD2
TXD1
MOSI
MISO
SCK
S3
9
0
9
QDPC
S2
10
10
0
QDPC
S1
11
11
0
DDRQS*
QDPC
12
S0
12
0
SCK
QD-
13
13
0
0x30 5014
0x30 5016
MOTOROLA
MOSI
QD-
14
14
0
14-11
QDMI-
LSB
LSB
SO
15
15
0