MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 714

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MPC555
USER’S MANUAL
NOTES:
Event Name
masked (ignored) whenever a word is accessed and the least-significant bit is masked
whenever a half-word is accessed. (For more information refer to
Half-Word Working
and less than. These signals are used to generate one of the following four events
(one from each comparator): equal, not equal, greater than, less than.
There are two load/store data comparators (comparators G,H) each is 32 bits wide and
can be programmed to treat numbers either as signed values or as unsigned values.
Each data comparator operates as four independent byte comparators. Each byte
comparator has a mask bit and generates two output signals: equal and less than, if
the mask bit is not set. Therefore, each 32 bit comparator has eight output signals.
These signals are used to generate the “equal and less than” signals according to the
compare size programmed by the user (byte, half-word, word). When operating in byte
mode all signals are significant, when operating in half-word mode only four signals
from each 32 bit comparator are significant. When operating in word mode only two
signals from each 32 bit comparator are significant.
From the new “equal and less than” signals and according to the compare type pro-
grammed by the user one of the following four match events are generated: equal, not
equal, greater than, less than. Therefore, from the two 32-bit comparators eight match
indications are generated: Gmatch[0:3], Hmatch[0:3].
According to the lower bits of the address and the size of the cycle, only match indica-
tions that were detected on bytes that have valid information are validated, the rest are
negated. Note that if the cycle executed has a smaller size than the compare size (e.g.,
a byte access when the compare size is word or half-word) no match indication will be
asserted.
Using the match indication signals four load/store data events are generated in the fol-
lowing way.
The four load/store data events together with the match events of the load/store ad-
dress comparators and the instruction watchpoints are used to generate the load/store
watchpoints and breakpoint according to the users programming.
1. ‘&’ denotes a logical AND, ‘|’ denotes a logical OR
(G | H)
(G&H)
G
H
/
MPC556
(Gmatch0 | Gmatch1 | Gmatch2 | Gmatch3)
(Hmatch0 | Hmatch1 | Hmatch2 | Hmatch3)
((Gmatch0 & Hmatch0) | (Gmatch1 & Hmatch1) | (Gmatch2 & Hmatch2) | (Gmatch3 & Hmatch3))
((Gmatch0 | Hmatch0) | (Gmatch1 | Hmatch1) | (Gmatch2 | Hmatch2) | (Gmatch3 | Hmatch3))
Modes). Each comparator generates two output signals: equal
Table 21-7 Load/Store Data Events
DEVELOPMENT SUPPORT
Rev. 15 October 2000
Event Function
1
21.3.1.2 Byte and
MOTOROLA
21-18