MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 468

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.5.4 QSMCM Interrupts
MPC555
USER’S MANUAL
The interrupt structure of the IMB3 supports a total of 32 interrupt levels that are time
multiplexed on the IRQB[0:7] lines as seen in
In this structure, all interrupt sources place their asserted level on a time multiplexed
bus during four different time slots, with eight levels communicated per slot. The
ILBS[0:1] signals indicate which group of eight are being driven on the interrupt re-
quest lines.
The QSMCM module is capable of generating one of the 32 possible interrupt levels
on the IMB3. The levels that the interrupt will drive can be programmed into the inter-
rupt request level (ILDSCI and ILQSPI) bits located in the interrupt configuration reg-
ister (QDSCI_IL and QSPI_IL). This value determines which interrupt signal
(IRQB[0:7]) is driven onto the bus during the programmed time slot.
shows a block diagram of the interrupt hardware.
ILBS[1:0]
IMB3 CLOCK
IMB3 IRQ[7:0]
/
MPC556
QUEUED SERIAL MULTI-CHANNEL MODULE
Figure 14-2 QSMCM Interrupt Levels
00
Table 14-3 Interrupt Levels
01
IRQ
7:0
ILBS[0:1]
Rev. 15 October 2000
00
01
10
11
10
IRQ
15:8
11
23:16
IRQ
Levels
16:23
24:31
Figure
8:15
0:7
31:24
00
IRQ
14-2.
01
IRQ
7:0
10
11
Figure 14-3
MOTOROLA
14-6