MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 720

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

21.4.1 Debug Mode Support
MPC555
USER’S MANUAL
In debug mode the development port controls also the debug mode features of the
CPU. For more information
The debug mode of the CPU provides the development system with the following basic
functions:
The following figure illustrates the debug mode logic implemented in the CPU.
• Gives an ability to control the execution of the processor and maintain control on
• It is possible to enter debug mode immediately out of reset thus allowing the user
• The user can selectively define, using an enable register, the events that will
• When in debug mode the user can detect the reason upon which the machine en-
• Entering into the debug mode in all regular cases is restartable in the sense that
• When in debug mode all instructions are fetched from the development port but
• Data Register of the development port is accessed using mtspr and mfspr in-
• Upon entering debug mode, the processor gets into the privileged state (MSRPR
• An OR signal of all exception cause register (ECR) bits (ECR_OR) enables the
/
it under all circumstances. The development port is able to force the CPU to enter
to the debug mode even when external interrupts are disabled.
even to debug a ROM-less system.
cause the machine to enter into the debug mode.
tered debug mode by reading a cause register.
the user is able to continue to run his regular program from the location where it
entered the debug mode.
load/store accesses are performed on the real system memory.
structions via special load/store cycles. (This feature together with the last one
enables easy memory dump & load).
= 0). This allows execution of any instruction, and access to any storage location.
development port to detect pending events while already in debug mode. An ex-
ample is the ability of the development port to detect a debug mode access to a
non existing memory space.
MPC556
21.5 Development Port
DEVELOPMENT SUPPORT
Rev. 15 October 2000
MOTOROLA
21-24