MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 561

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

15.12 MIOS Pulse Width Modulation Submodule (MPWMSM)
MPC555
USER’S MANUAL
Counter
Clock
The purpose of the MIOS pulse width modulation submodule (MPWMSM) is to create
a variable pulse width output signal at a wide range of frequencies, independent of oth-
er MIOS1 output signals. The MPWMSM includes its own 8-bit prescaler and counter
and, thus, does not use the MIOS1 16-bit counter buses.
The MPWMSM pulse width can vary from 0.0% to 100.0%, with up to 16 bits of reso-
lution. The finest output resolution is the MCU IMB clock time divided by two (for a
F
teen bits of resolution and the overall prescaler divide ratio varying from divide-by-2 to
divide-by-4096, the period of the PWM output can range from 3.28 ms to 6.7 s (assum-
ing a f
reduced. The period can be as fast as 205 µs (4.882 KHz) with twelve bits of resolu-
tion, as fast as 12.8 µs (78.125 KHz) with eight bits of resolution and as fast as 3.2 µs
(312.500 KHz) with six bits of resolution (still assuming a f
stage prescaler divide-by-2 clock selection).
Refer to
SYS
/
of 40.0 MHz, the finest output pulse width resolution is 50 ns). With the full six-
MPC556
SYS
Table 15-36
of 40 MHz). By reducing the counting value, the output signal period can be
16-bit Down Counter
Next Period Register
8- bit Prescaler
PS0 - PS7
(NCOUNT)
MPWMC
MPWMA
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Figure 15-6 MPWMSM Block Diagram
for the MPWMSM relative I/O pin implementation.
= 0x0001
FLAG
Request Bus
LOAD
Rev. 15 October 2000
FREN
EN
Pulse Width Register
Register MPWMB1
Next Pulse Width
<= Comparator
PWMB2
TRSP
16-bit
PWMB
Flip-Flop
Output
EN
MIOB
SYS
Output
Buffer
POL
of 40 MHz and a first
PIN
Output
Logic
DDR
MOTOROLA
Output
15-25
Pin