MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 242

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
6.13.4.8 Periodic Interrupt Status and Control Register (PISCR)
6.13.4.9 Periodic Interrupt Timer Count Register (PITC)
MPC555
USER’S MANUAL
PISCR — Periodic Interrupt Status and Control Register
PITC — Periodic Interrupt Timer Count
HARD RESET:
Bit(s)
MSB
MSB
9:12
0:7
16
13
14
15
0
0
0
0
0
8
RESET:
RESET:
The PISCR contains the interrupt request level and the interrupt status bit. It also con-
tains the controls for the 16 bits to be loaded into a modulus counter. This register can
be read or written at any time.
The PITC register contains the 16 bits to be loaded in a modulus counter. This register
is readable and writable at any time.
17
/
1
0
1
0
0
MPC556
Name
PIRQ
PITF
PTE
PIE
PS
18
2
0
2
0
0
Periodic interrupt request. These bits determine the interrupt priority level of the PIT. Refer to
Interrupt Controller
Periodic interrupt status. This bit is set if the PIT issues an interrupt. The PIT issues an interrupt
after the modulus counter counts to zero. PS can be negated by writing a one to it. A write of zero
has no affect.
Reserved
Periodic interrupt enable. If this bit is set, the time base generates an interrupt when the PS bit
is set.
PIT freeze. If this bit is set, the PIT stops while FREEZE is asserted.
Periodic timer enable
0 = PIT stops counting and maintains current value
1 = PIT continues to decrement
19
3
0
3
0
0
PIRQ
SYSTEM CONFIGURATION AND PROTECTION
20
4
0
4
0
0
Table 6-18 PISCR Bit Descriptions
21
5
0
5
0
0
for interrupt level encodings.
Rev. 15 October 2000
22
6
0
6
0
0
RESERVED
23
7
0
7
0
0
PITC
PS
24
8
0
8
0
0
Description
25
9
0
9
0
0
RESERVED
10
10
26
0
0
0
11
11
27
0
0
0
12
12
28
0
0
0
PIE
13
13
29
0
0
0
0x2F C240
0x2F C244
MOTOROLA
PITF
14
14
30
0
0
0
LSB
PTE
LSB
15
15
31
6-34
0
0
0
6.4

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