MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 404

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
12.2 UIMB Block Diagram
12.3 Clock Module
MPC555
USER’S MANUAL
The clock module within the UIMB interface generates the IMB clock. The IMB clock
is the main timing reference used within the IMB modules. The IMB clock is often re-
ferred to in the IMB module sections as F
The IMB clock is generated based on the STOP and HSPEED bits in the UIMB module
configuration register (UMCR). If the STOP bit is 1, the IMB clock is not generated. If
the STOP bit is 0 and the HSPEED bit is 0, the IMB clock is generated as the inversion
of the internal system clock. This is the same frequency as the CLKOUT if EBDF is
0b00 – full speed external bus. (See
clock is one-half of the internal system frequency. (See
/
MPC556
STOP
0
0
1
Figure 12-1 UIMB Interface Module Block Diagram
Table 12-1 STOP and HSPEED Bit Functionality
U-bus
HSPEED
U-BUS TO IMB3 BUS INTERFACE (UIMB)
X
0
1
Rev. 15 October 2000
IMB bus frequency is the same as U-bus frequency.
IMB bus frequency is half that of the U-bus frequency.
IMB clock is not generated.
Address
Decode
Interface
Data
U-bus
Mux
Figure
Clock Control
Synchronizer
Scan Control
Interrupt
SYS
12-2.) If the HSPEED bit is 1, then the IMB
or IMB3 clock.
Interface
IMB3
Functionality
Figure
12-3.)
IMB3
MOTOROLA
12-2

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