MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 693

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
20.1 Features
20.2 Block Diagram
MPC555 / MPC556
USER’S MANUAL
The MPC555 / MPC556 contains two static random access memory (SRAM) modules:
a 16-Kbyte module and a 10-Kbyte module. The SRAM modules provide the micro-
controller unit (MCU) with fast (one cycle access), general-purpose memory. The
SRAM can be read or written as either bytes, half words, or words.
Each SRAM module is built with a series of 4-Kbyte blocks and occupies a continuous
block of memory. For a RAM size array block of less than 4 Kbytes (e.g., the 2-Kbyte
array in the 10-Kbyte SRAM module), the remaining 2 Kbytes are unimplemented and
unusable.
The SRAM modules are accessible to the CPU and other bus masters via the L-bus
on the CPU chip. To improve access time, each SRAM module resides on a separate
bus interface unit (BIU). Each BIU has its own module control register.
Figure 20-1
• One-cycle access
• Byte, half-word, or word read/write accesses
• Individual protection control bits provided for 4-Kbyte block boundaries
• Two-cycle access for power savings
• Low power standby operation for data retention
• Supports pipelining
— read only region
— data only region
— user/supervisor
— V
Power Gone
L-bus
DDI
STATIC RANDOM ACCESS MEMORY (SRAM)
shows the major components of an SRAM module.
= 0, no read/writes to the SRAM; VDDSRAM = 3.3 V to retain data
STATIC RANDOM ACCESS MEMORY (SRAM)
Figure 20-1 SRAM Block Diagram
(Maximum 16 Kbytes)
Rev. 15 October 2000
SRAM Array
SECTION 20
Keep-Alive Power
MOTOROLA
20-1

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