MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 875

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
E.3.4 PLL Off-Chip Capacitor C
E.4 Clock Oscillator and PLL External Components Layout Requirements
E.4.1 Traces and Placement
MPC555 / MPC556
USER’S MANUAL
C
and VDDSYN pads. The maximum noise allowed on XFC is 50 mV peak to peak with
typical cut-off frequency of 500 Hz.
The required value for C
tiplication factor as defined in the PLPRCR register (refer to
Traces connecting capacitors, crystal, resistor should be as short as possible. There-
fore, the components (crystal, resistor and capacitors) should be placed as close to
the oscillator pins of the MPC555 / MPC556 as possible.
XFC
1. 0 < (MF + 1) < 4
2. (MF + 1) ≥ 4
is the PLL feedback capacitor. It must be located as close as possible to the XFC
Keyed
Vcc 3 V
BOARD
BOARD
Figure E-8 PLL Off-Chip Capacitor Example
Figure E-7 LC Filter Example (Alternative)
8.2 mH
FXC
100 nF
CLOCK AND BOARD GUIDELINES
C
XFC
are determined by the following two cases. MF is the mul-
VSSSYN
XFC
C
C
Rev. 15 October 2000
XFC
XFC
= (680 x (MF + 1) – 120) pF
= 1100 x (MF +1) pF
MPC555 / MPC556
VDDSYN
VDDSYN
XFC
MPC555 / MPC556
Table
8-10).
MOTOROLA
E-7

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