MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 451

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

QACR2 — Control Register 2
MPC555
USER’S MANUAL
RESET:
Bit(s)
CIE2
9:15
MSB
3:7
0
1
2
8
0
0
which is readable only when the test mode is enabled. Most of the bits are typically
written once when the software initializes the QADC64, and not changed afterwards.
PIE2
/
RESUME
1
0
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Name
SSE2
CIE2
PIE2
MQ2
BQ2
SSE2
2
0
Queue 2 completion interrupt enable. CIE2 enables completion interrupts for queue 2. The inter-
rupt request is generated when the conversion is complete for the last CCW in queue 2.
0 = Queue 2 completion interrupts disabled.
1 = Generate an interrupt request after completing the last CCW in queue 2.
Queue 2 pause interrupt enable. PIE2 enables pause interrupts for queue 2. The interrupt re-
quest is generated when the conversion is complete for a CCW that has the pause bit set.
0 = Queue 2 pause interrupts disabled.
1 = Generate an interrupt request after completing a CCW in queue 2 which has the pause bit set.
Queue 2 single-scan enable bit. SSE2 enables a single-scan of queue 2 after a trigger event oc-
curs. The SSE2 bit may be set to a one during the same write cycle that sets the MQ2 bits for
the single-scan queue operating mode. The single-scan enable bit can be written as a one or a
zero, but is always read as a zero.
The SSE2 bit allows a trigger event to initiate queue execution for any single-scan operation on
queue 2. The QADC64 clears SSE2 when the single-scan is complete.
Queue 2 operating mode. The MQ2 field selects the queue operating mode for queue 2.
13-15
Queue 2 resume. RESUME selects the resumption point after queue 2 is suspended by queue
1. If RESUME is changed during execution of queue 2, the change is not recognized until an end-
of-queue condition is reached, or the queue operating mode of queue 2 is changed.
0 = After suspension, begin execution with the first CCW in queue 2 or the current sub-queue.
1 = After suspension, begin execution with the aborted CCW in queue 2.
Beginning of queue 2. The BQ2 field indicates the location in the CCW table where queue 2 be-
gins. The BQ2 field also indicates the end of queue 1 and thus creates an end-of-queue condition
for queue 1. Setting BQ2 to any value ≥ 64 (0b1000000) allows the entire RAM space for queue
1 CCWs.
3
0
shows the bits in the MQ2 field which enable different queue 2 operating modes.
Table 13-14 QACR2 Bit Descriptions
4
0
MQ2
5
0
Rev. 15 October 2000
6
0
7
0
SUME
RE-
8
0
Description
9
1
10
0
11
0
BQ2
12
0
13
0
0x30 4C0E
0x30 480E
MOTOROLA
14
0
Table
13-39
LSB
15
0