MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 514

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.8.7.4 Parity Checking
14.8.7.5 Transmitter Operation
MPC555
USER’S MANUAL
The SCI receiver operates asynchronously. An internal clock is necessary to synchro-
nize with an incoming data stream. The SCI baud rate generator produces a receive
time sampling clock with a frequency 16 times that of the SCI baud rate. The SCI de-
termines the position of bit boundaries from transitions within the received waveform,
and adjusts sampling points to the proper positions within the bit period.
Table 14-29
rate with this IMB clock speed is 1250 Kbaud.
The PT bit in SCCxR1 selects either even (PT = 0) or odd (PT = 1) parity. PT affects
received and transmitted data. The PE bit in SCCxR1 determines whether parity
checking is enabled (PE = 1) or disabled (PE = 0). When PE is set, the MSB of data
in a frame (i.e., the bit preceding the stop bit) is used for the parity function. For trans-
mitted data, a parity bit is generated. For received data, the parity bit is checked. When
parity checking is enabled, the PF bit in the SCI status register (SCxSR) is set if a par-
ity error is detected.
Enabling parity affects the number of data bits in a frame, which can in turn affect
frame size.
The transmitter consists of a serial shifter and a parallel data register (TDRx) located
in the SCI data register (SCxDR). The serial shifter cannot be directly accessed by the
CPU. The transmitter is double-buffered, which means that data can be loaded into the
TDRx while other data is shifted out. The TE bit in SCCxR1 enables (TE = 1) and dis-
ables (TE = 0) the transmitter.
The shifter output is connected to the TXD pin while the transmitter is operating (TE =
1, or TE = 0 and transmission in progress). Wired-OR operation should be specified
when more than one transmitter is used on the same SCI bus. The WOMS bit in
/
MPC556
Table 14-24
shows possible baud rates for a 40-MHz IMB clock. The maximum baud
NOTES:
1,250,000.00
Baud Rate
1. These rates are based on a 40-MHz IMB clock.
57,600.00
38,400.00
32,768.00
28,800.00
19,200.00
14,400.00
Nominal
9,600.00
4,800.00
2,400.00
1,200.00
600.00
300.00
Table 14-29 Examples of SCIx Baud Rates
QUEUED SERIAL MULTI-CHANNEL MODULE
shows possible data and parity formats.
1,250,000.00
Baud Rate
56,818.18
37,878.79
32,894.74
29,069.77
19,230.77
14,367.81
9,615.38
4,807.69
2,399.23
1,199.62
Actual
600.09
299.98
Rev. 15 October 2000
Percent
Error
-1.36
-1.36
-0.22
-0.03
-0.03
-0.01
0.00
0.39
0.94
0.16
0.16
0.16
0.02
Value of
SCxBR
1042
2083
4167
130
260
521
22
33
38
43
65
87
1
1
MOTOROLA
14-52