MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 700

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
21.2.1.2 History Buffer Flushes Status Pins— VFLS [0..1]
21.2.1.3 Queue Flush Information Special Case
21.2.2 Program Trace when in Debug Mode
MPC555
USER’S MANUAL
The history buffer flushes status pins denote how many instructions are flushed from
the history buffer this clock due to an
There is one special case when although queue flush information is expected on the
VF pins, (according to the last value on the VF pins), regular instruction type informa-
tion is reported. The only instruction type information that can appear in this case is VF
= 111, branch (direct or indirect) NOT taken. Since the maximum queue flushes pos-
sible is five, it is easy to identify this special case.
When entering debug mode an interrupt/exception taken is reported on the VF pins,
(VF = 100) and a cycle marked with the program trace cycle is made visible externally.
When the CPU is in debug mode, the VF pins equal ‘000’ and the VFLS pins equal
‘11’. For more information on debug mode refer to
face
If VSYNC is asserted/negated while the CPU is in debug mode, this information is re-
ported as the first VF pins report when the CPU returns to regular mode. If VSYNC
was not changed while in debug mode. the first VF pins report will be of an indirect
branch taken (VF = 101), suitable for the rfi instruction that is being issued. In both
/
MPC556
VFLS[0:1]
00
01
10
11
NOTES:
Table 21-2 VF Pins Queue Flush Encodings
VF[0:2]
000
001
010
011
100
101
110
111
1. Refer to
0 instructions flushed from history queue
1 instruction flushed from history queue
2 instructions flushed from history queue
Used for debug mode indication (FREEZE). Program trace ex-
ternal hardware should ignore this setting.
Table 21-3 VFLS Pin Encodings
0 instructions flushed from instruction queue
1 instruction flushed from instruction queue
2 instructions flushed from instruction queue
3 instructions flushed from instruction queue
4 instructions flushed from instruction queue
5 instructions flushed from instruction queue
Reserved
Instruction type information
Table
DEVELOPMENT SUPPORT
Rev. 15 October 2000
21-1.
History Buffer Flush Information
Queue Flush Information
exception.Table 21-3
1
21.4 Development System Inter-
shows VFLS encodings.
MOTOROLA
21-4

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