MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 232

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

* The reset value is a reset configuration word value, extracted from the indicated internal data bus line. Refer to
MPC555
USER’S MANUAL
PRPM SLVM
Bit(s)
19:20
23:24
30:31
ID16*
0:15
Hard Reset Configuration
16
16
17
18
21
22
25
26
27
28
29
RESET:
17
/
0
PRPM
SIZEN
MPC556
CONT
Name
SLVM
SUPU
RESV
TRAC
INST
SIZE
—
—
—
—
—
18
0
0
Reserved
Peripheral mode. In this mode, the internal RCPU core is shut off and an alternative master on
the external bus can access any internal slave module. The reset value of this bit is determined
by the reset configuration word bit 16. The bit can also be written by software.
0 = Normal operation
1 = Peripheral mode operation
Slave mode (valid only if PRPM = 0). In this mode, an alternative master on the external bus can
access any internal slave module while the internal RCPU core is fully operational. If PRPM is
set, the value of SLVN is a “don’t care.”
0 = Normal operation
1 = Slave mode
Reserved
Size attribute. If SIZEN = 1, the SIZE bits controls the internal bus attributes as follows:
00 = Double word (8 bytes)
01 = Word (4 bytes)
10 = Half word (2 bytes)
11 = Byte
Supervisor/user attribute. SUPU controls the supervisor/user attribute as follows:
0 = Supervisor mode access permitted to all registers
1 = User access permitted to registers designated “user access”
Instruction attribute. INST controls the internal bus instruction attribute as follows:
0 = Instruction fetch
1 = Operand or non-CPU access
Reserved
Reservation attribute. RESV controls the internal bus reservation attribute as follows:
0 = Storage reservation cycle
1 = Not a reservation
Control attribute. CONT drives the internal bus control bit attribute as follows:
0 = Access to MPC555 / MPC556 control register, or control cycle access
1 = Access to global address map
Reserved
Trace attribute. TRAC controls the internal bus program trace attribute as follows:
0 = Program trace
1 = Not program trace
External size enable control bit. SIZEN determines how the internal bus size attribute is driven:
0 = Drive size from external bus signals TSIZE[0:1]
1 = Drive size from SIZE0, SIZE1 in EMCR
Reserved
19
0
SIZE
Word.
SYSTEM CONFIGURATION AND PROTECTION
20
1
Table 6-12 EMCR Bit Descriptions
SUPU
21
0
INST
Rev. 15 October 2000
22
1
RESERVED
23
0
24
0
Description
RESV CONT
25
1
26
1
27
0
0
TRAC SIZEN
28
1
29
1
MOTOROLA
RESERVED
30
0
LSB
31
7.5.2
6-24
0