MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 288

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SCCR — System Clock Control Register
POWER-ON RESET:
HARD RESET:
8.12 Clocks Unit Programming Model
8.12.1 System Clock Control Register (SCCR)
MPC555
USER’S MANUAL
DBCT
MSB
POWER-ON RESET:
HARD RESET:
U
0
1
16
U
0
The SPLL has a 32-bit control register, SCCR, which is powered by keep-alive power.
EECLK
NOTES:
1. The hard reset value is a reset configuration word value, extracted from the indicated internal data bus lines.
U = Unaffected by reset
2. RTDIV will be 0 if MODCK[1:3] = 0b000
3. EQ2 = MODCK1
4. EQ3 = (MODCK1 & MODCK2 & MODCK3) | (MODCK1 & MODCK2 & MODCK3) | (MODCK1 & MODCK2 &
5. On mask sets prior to K62N, ENGDIV defaults to 0b000001.
Refer to
MODCK3). See
4. Do not hold the 3-V supplies at ground while VDDH/VDDA is ramping to 5 V.
5. If 5 V is applied before the 3-V supply, all 5-V outputs will be in indeterminate
1
0
0
17
U
/
0
COM
MPC556
Flash programming requirements are the same as normal system power, ex-
cept VPP = 5.0 ± 0.25 V
states until the 3-V supply reaches a level that allows reset to be distributed
throughout the device
7.5.2 Hard Reset Configuration
ID2
ID2
2
18
U
1
1
1
DCSLR
Table
U
3
0
19
U
1
8-1.
MFPDL
20
4
0
0
ENGDIV
U
1
LPML
CLOCKS AND POWER CONTROL
21
U
5
0
0
1
5
Rev. 15 October 2000
TBS
22
U
U
6
0
1
Word.
RTDIV
23
1
U
U
7
1
2
2
STBUC
24
—
U
8
0
0
SERVED
25
RE-
0
0
9
0
0
DFNL
PRQEN RTSEL
26
0
0
10
1
1
EQ2
27
0
0
11
U
3
BUCS
28
—
0
0
12
U
29
0
0
13
ID[13:14]
ID[13:14]
0x2F C280
EBDF
MOTOROLA
DFNH
30
0
0
14
1
1
LSB
EQ3
31
8-28
LME
0
0
15
U
4