MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 632

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DSSR — Development Support Status Register
17.4.4 Development Support Status Register
17.4.5 TPU3 Interrupt Configuration Register
TICR — TPU3 Interrupt Configuration Register
MPC555
USER’S MANUAL
Bit(s)
MSB
13:15
MSB
0:7
0
0
10
11
12
0
8
9
RESET:
RESET:
1
/
1
0
MPC556
Name
PCBK
CHBK
SRBK
BKPT
TPUF
RESERVED
—
—
2
2
0
Reserved
Breakpoint asserted flag. If an internal breakpoint caused the TPU3 to enter the halted state, the
TPU3 asserts the BKPT signal on the IMB and sets the BKPT flag. BKPT remains set until the
TPU3 recognizes a breakpoint acknowledge cycle, or until the IMB FREEZE signal is asserted.
µPC breakpoint flag. PCBK is asserted if a breakpoint occurs because of a µPC (microprogram
counter) register match with the µPC breakpoint register. PCBK is negated when the BKPT flag
is cleared.
Channel register breakpoint flag. CHBK is asserted if a breakpoint occurs because of a CHAN
register match with the CHAN register breakpoint register. CHBK is negated when the BKPT flag
is cleared.
Service request breakpoint flag. SRBK is asserted if a breakpoint occurs because of any of the
service request latches being asserted along with their corresponding enable flag in the devel-
opment support control register. SRBK is negated when the BKPT flag is cleared.
TPU3 FREEZE flag. TPUF is set whenever the TPU3 is in a halted state as a result of FREEZE
being asserted. This flag is automatically negated when the TPU3 exits the halted state because
of FREEZE being negated.
Reserved
RESERVED
3
3
0
4
4
0
Table 17-8 DSSR Bit Descriptions
5
0
5
0
TIME PROCESSOR UNIT 3
CIRL
Rev. 15 October 2000
6
0
6
0
7
0
7
0
BKPT PCBK CHBK SRBK TPUF
8
0
8
0
Description
ILBS
9
0
9
0
10
10
0
0
11
11
0
0
RESERVED
12
12
0
13
13
0
0x30 4006
0x30 4406
RESERVED
0x30 4008
0x30 4408
MOTOROLA
14
14
0
17-14
LSB
LSB
15
15
0