MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 530

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
14.9.8 QSCI1 Receiver Block Diagram
14.9.9 QSCI1 Additional Receive Operation Features
MPC555
USER’S MANUAL
Receiver Baud Rate
Clock
SCI1 Non-Queue Operation
The block diagram of the enhancements to the SCI receiver is shown below in
14-20.
• Available on a single SCI channel (SCI1) implemented by the queue receiver en-
• When the queue is disabled (QRE = 0), the SCI functions in single buffer receive
/
able (QRE) bit set by software. When the queue is enabled, software should ig-
nore the RDRF bit.
mode (as originally designed) and RDRF and OR function as previously defined.
MPC556
RxD
Figure 14-20 Queue Receiver Block Enhancements
Queue Control
QUEUED SERIAL MULTI-CHANNEL MODULE
H (8) 7 6 5 4 3 2 1 0 L
Rev. 15 October 2000
SCxDR Rx BUFFER
10 (11) - BIT
Rx Shift Register
Queue Status
4-bits
Queue Control
Logic
SCI Interrupt Request
SCRQ[0]
SCRQ[1]
SCRQ[15]
MOTOROLA
Figure
Data Bus
14-68

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