MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 144

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DSISR — DAE/Source Instruction Service Register
DAR — Data Address Register
MSB
MSB
3.9.2 DAE/Source Instruction Service Register (DSISR)
3.9.3 Data Address Register (DAR)
MPC555
USER’S MANUAL
0
0
NOTES:
Bit(s)
28
29
30
31
1. This bit is only available on the MPC556.
The floating-point exception mode bits are interpreted as shown in
The 32-bit DSISR identifies the cause of data access and alignment exceptions.
After an alignment exception, the DAR is set to the effective address of a load or store
element.
1
1
2
2
/
MPEN
3
3
MPC556
Name
Table 3-12 Machine State Register Bit Descriptions (Continued)
DC-
LE
—
RI
4
4
01, 10, 11
1
FE[0:1]
5
5
00
Reserved
Decompression On/Off
0 = RCPU Normal Operation
1 = RCPU is running in Compressed mode
Recoverable exception (for machine check and non-maskable breakpoint exceptions)
0 = Machine state is not recoverable.
1 = Machine state is recoverable.
Little-endian mode
0 = Processor operates in big-endian mode during normal processing.
1 = Processor operates in little-endian mode during normal processing.
6
6
Table 3-13 Floating-Point Exception Mode Bits
7
7
Ignore exceptions mode — Floating-point exceptions do not cause the
floating-point assist error handler to be invoked.
Floating-point precise mode — The system floating-point assist error
handler is invoked precisely at the instruction that caused the enabled
exception.
8
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
CENTRAL PROCESSING UNIT
Rev. 15 October 2000
RESET: UNCHANGED
RESET: UNCHANGED
Data Address
DSISR
Description
Mode
Table 3-13
.
MOTOROLA
SPR 18
SPR 19
3-22
LSB
LSB
31
31