MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 545

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
15.8.1.2 MIOS1 Vector Register
15.8.1.3 MIOS1 Module and Version Number Register
MIOS1VNR — MIOS1 Module/Version Number Register
15.8.1.4 MIOS1 Module Configuration Register
MIOS1MCR — MIOS1 Module Configuration Register
MPC555
USER’S MANUAL
STOP
MSB
MSB
Bit(s)
Bit(s)
1:13
8:15
0:7
0
0
0
14
15
RESET:
0
This register is used for MIOS1 factory testing and selecting between the MIOS1 pin
functions for the MPIO32B[0:3] and the developement support pin functions of
VFLS[0:1] and VF[0-2].
This register is used only in MCUs that use vectored interrupts. The MPC555 /
MPC556 does not use this register.
This read-only register contains the hard-coded values of the module and version
number.
1
1
0
0
/
MPC556
Name
Name
TEST
VFLS
MN
VN
VF
FRZ
2
2
0
This bit is reserved for factory testing of the MIOS1. The test mode is disabled by reset.
Reserved
Pin multiplex. This bit is used to determine the usage of the MIOS1 pins. Refer to the pad-ring
specification of the chip for details about the usage of this bit. This bit is set to 0 by reset.
0 = the concerned pins are dedicated to the MIOS1.
1 = alternate function
Pin multiplex. This bit is used to determine the usage of the MIOS1 pins. Refer to the pad-ring
specification of the chip for details about the usage of this bit. This bit is set to 0 by reset.
0 = the concerned pins are dedicated to the MIOS1.
1 = alternate function
Module number = 1 on the MPC555 / MPC556. The MPC555 / MPC556 implements the MIOS1
module.
Version number
RST
3
3
0
MN
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Table 15-3 MIOS1TPCR Bit Descriptions
Table 15-4 MIOS1VNR Bit Descriptions
4
4
0
RESERVED
5
5
0
Rev. 15 October 2000
6
6
0
7
7
0
SUPV
8
8
0
Description
Description
9
9
0
RESERVED
10
10
0
11
11
0
VN
12
12
0
RESERVED (IARB)
13
13
0
0x30 6804
0x30 6806
MOTOROLA
14
14
0
LSB
LSB
15-9
15
15
0

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