MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 963

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
11:12
Bits
1:2
4:5
7:8
10
13
0
3
6
9
LW0LADC
LW0LDDC
LW0IADC
LW1IADC
LW0EN
LW1EN
LW0LA
LW0LD
LW0IA
LW1IA
Name
1st L-bus watchpoint enable bit
0 watchpoint not enabled (reset value)
1 watchpoint enabled
1st L-bus watchpoint I-addr watchpoint selection
00 first I-bus watchpoint
01 second I-bus watchpoint
10 third I-bus watchpoint
11 fourth I-bus watchpoint
1st L-bus watchpoint
care/don’t care I-addr events
0 Don’t care
1 Care
1st L-bus watchpoint
L-addr events selection
00 match from comparator E
01 match from comparator F
10 match from comparators (E&F)
11 match from comparators (E | F)
1st L-bus watchpoint
care/don’t care L-addr events
0 Don’t care
1 Care
1st L-bus watchpoint
L-data events selection
00 match from comparator G
01 match from comparator H
10 match from comparators (G&H)
11 match from comparators (G | H)
1st L-bus watchpoint
care/don’t care L-data events
0 Don’t care
1 Care
2nd L-bus watchpoint enable bit
0 watchpoint not enabled (reset value)
1 watchpoint enabled
2nd L-bus watchpoint I-addr watchpoint selection
00 first I-bus watchpoint
01 second I-bus watchpoint
10 third I-bus watchpoint
11 fourth I-bus watchpoint
2nd L-bus watchpoint
care/don’t care I-addr events
0 Don’t care
1 Care
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 23-25. LCTRL2 Bit Descriptions
Description
Development Support
23-49