MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 804
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Part Number:
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Modular Input/Output Subsystem (MIOS14)
Figure 17-44
measurement. The software designates whether the rising or falling edge of the input signal is to be used
for the measurements. When the edge is detected, the state of the 16-bit counter bus is stored in register A
and the content of register B1 is transferred to register B2. After register B2 is safely latched, the content
of register A is transferred to register B1. This procedure gives the software coherent current and previous
samples in registers A and B2 at all times. An interrupt is available for the cases where the software needs
to be aware of each new sample. Note that a software option is provided to also generate an interrupt after
the first edge.
17.13.3 MIOS14 Double Edge Single Output Pulse Generation
Software can initialize the MIOS14 to generate both the rising and the falling edge of an output pulse. With
a MDASM, pulses as narrow as 50 ns can be generated since software action is not needed between the
edges. Pulses as long as 2.1 s can be generated. When an interrupt is desired, it can be selected to occur on
every edge or only after the second edge.
Figure 17-45
single output pulse. The software puts the compare value for one edge in register A and the other one in
register B2. The MDASM automatically creates both edges and the pulse can be selected by software to
be a high-going or a low-going. After the trailing edge, the MDASM stops to await further commands from
the software. Note that a single edge output can be generated by writing to only one register.
17-72
MIOS14 Modulus Counter Submodule
Prescaler
Select
Clock
or Pin
From
shows a counter submodule and a DASM combination as an example of period
shows how a counter submodule and a MDASM can be used to generate both edges of a
Figure 17-44. MIOS14 Example: Double Capture Period Measurement
16-bit Up-Counter
MPC561/MPC563 Reference Manual, Rev. 1.2
Submodule Bus
Counter
Buses
16-bit
Two
Select
Bus
in IPM mode (MOD3-MOD0 = 0b0010)
16-bit Register A
16-bit Register B1
16-bit Register B2
MIOS14 Double Action Submodule
Freescale Semiconductor
Designated
Interrupt
Capture
Detect
Edge
Input
Edge
on
Signal
Input
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