MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 607

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

14.6
The QADC64E requires accurate, noise-free input signals for proper operation. This section discusses the
design of external circuitry to maximize QADC64E performance.
The QADC64E uses the external signals shown in
be used as general-purpose digital input/output signals. With external multiplexing MPC561/MPC563 can
support 41 analog inputs. In addition, there are three analog reference signals and two analog submodule
power signals, shared by each QADC64E module.
14.6.1
The sixteen port signals can be used as analog inputs, or as a bidirectional 16-bit digital input/output port.
Port A signals are referred to as PQA[7:0] when used as a bidirectional 8-bit digital input/output port.
These eight signals may be used for general-purpose digital input signals or push-pull digital output
signals. Port B signals are referred to as PQB[7:0] and operate the same as Port A.
Port A and B signals are connected to a digital input synchronizer during reads and may be used as general
purpose digital inputs when the applied voltages meet high voltage input (V
requirements. Refer to
requirements.
Freescale Semiconductor
Trig1
(gate)
EOC
QS
CWPQ1
Q1 RES
CF1
TOR1
CWP
QADC64E Integration Requirements
Port Digital Input/Output Signals
LAST
0
Appendix F, “Electrical
LAST
CCW0
XX
Figure 14-46. Gated Mode, Continuous Scan Timing
8
MPC561/MPC563 Reference Manual, Rev. 1.2
CCW0
CCW1
R0
CCW1
R1
CCW2
Characteristics,” for more information on voltage
Figure
CCW3
CCW2
R2
14-1. There are 16 channel signals that can also
Q restart
CCW3
CCW0
R3
IH
QADC64E Enhanced Mode Operation
) and low voltage input (V
CCW2
CCW3
R2
Q restart
CCW3
CCW0
R3
14-65
IL
)