MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1043

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

24.13.1 Ownership Trace Messaging
Ownership trace information is messaged via the auxiliary port using an ownership trace message (OTM).
The ownership trace register (OT), which can be accessed via auxiliary port, is updated by the operating
system software to provide task/process ID information. When new information is updated in the register
by the embedded processor, it is messaged out via the auxiliary port, allowing development tools to trace
ownership flow.
Ownership trace information is messaged out in the following format:
24.13.2 Queue Overflow Ownership Trace Error Message
A program/data/ownership trace overrun error occurs when a trace message cannot be queued due to the
queue being full, provided ownership trace is enabled.
The overrun error causes the message queue to be flushed, and a error message to be queued. The error
code within the error message indicates that a program/data/ownership trace overrun error has occurred.
Refer to
The error message has the following format:
24.13.2.1 OTM Flow
Ownership trace messages are generated when the operating system (privileged supervisor task) writes to
the memory-mapped ownership trace register.
The following flow describes the OTM process.
Freescale Semiconductor
1. The OT register is a memory-mapped register, whose address is located in the UBA. The OT
2. Only privileged writes (byte/half word or word) initiated by the RCPU to the OT register that
3. OT register reads and non-privileged OT register writes, or writes initiated by any source other than
register address can be read from the UBA register by the IEEE-ISTO 5001 tool.
terminate normally are valid. The data value (word) written into the register is formed into the
ownership trace message that is queued to be transmitted.
the RCPU, do not cause ownership trace messages to be transmitted by the READI module.
Table
24-20.
Figure 24-74. Ownership Trace Message Format
TCODE (2)
MPC561/MPC563 Reference Manual, Rev. 1.2
TCODE (8)
[6 bits]
Figure 24-75. Error Message Format
[6 bits]
Length = 38 bits
Length = 11 bits
Task/Process ID Tag
[32 bits]
Error Code (0b0 0000,
0b0 0001, 0b0 0010,
0b0 0111)
[5 bits]
READI Module
24-75