MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 810

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Peripheral Pin Multiplexing (PPM) Module
18.3.1.1
In the MPC561/MPC563 devices, the PPM module supports multiplexing of four modules: TPU3_A,
TPU3_B, MIOS and GPIO registers, internal to the PPM. Internal multiplexers route data between the
MCU internal modules and the external device through the PPM. Four configuration registers,
TX_CONFIG_1, TX_CONFIG_2, RX_CONFIG_1 and RX_CONFIG_2, control these internal
multiplexers. By programming the configuration registers the PPM multiplexers select which internal
module will drive data out of the PPM and which will receive data from the PPM.
The TX_CONFIG and RX_CONFIG registers allocate two bits to control each of the 16 internal
multiplexers. During transmit operations, the TX_CONFIG registers determine which internal module’s
data will be sampled and routed to the transmit sample-and-shift register, TX_DATA. During receive
operations, data in the receive sample-and-shift register, RX_SHIFTER, is routed to the internal module
specified by the value of the RX_CONFIG registers, or in the case where GPDI is the destination, data is
routed directly from PPM_RX[0:1]. Refer to
18-4
IMB3 interface
TPU3_B
TPU3_A
MIOS
(GPDO, GPDI)
Internal Multiplexing
GPIO
PPM Module
Figure 18-2. Block Diagram of PPM Module
MPC561/MPC563 Reference Manual, Rev. 1.2
PPM_REGS
PPM_SHORT
PPM_MUX
Figure
Channel_TX[15:0]
Channel_RX[15:0]
18-4.
SYSCLK
Clock Generator
TCLK and Update
PPM_SHIFTER
Generator
Clock
Clock
Freescale Semiconductor
SYSCLK
PPM_TCLK
PPM_TSYNC
PPM_TX[0:1]
PPM_RX[0:1]