MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 990

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

READI Module
24.7.2
Figure 24-11
The signal interface is responsible for handshaking with the message queue and registers. It is also
responsible for requesting new messages from the message queue. A message is always requested from
the message queue if the message queue is not empty, the message buffer is available and a higher priority
message is not requesting to be transmitted. The rate at which data is removed from the queue depends on
the average message length, the number of MDO signals, and the MCKO clocking rate.
24.7.3
Message formatting is performed in the signal interface block. The following priority scheme is
implemented for messages sent to the signal output formatter block, with 1 being the highest priority and
5 being the lowest priority:
24-22
.
1. Invalid message
2. READI register access handshakes (device ready/download information)
3. Watchpoint messages
4. Read/write access message
5. RCPU development access message
Trace messages from Queue
RCPU Dev. Port message
R/W Access message
Functional Block Diagram
Message Priority
Watchpoint message
depicts the functional block diagram of the signal interface.
Auxiliary messages
Signal Interface
Control Unit
Figure 24-11. Functional Diagram of Signal Interface
MPC561/MPC563 Reference Manual, Rev. 1.2
MUX
Invalid Message
BUF
Output Formatter
Input Formatter
Data to READI
Registers
BUF
Freescale Semiconductor
MDO[7:0]
MDI[1:0]
Data
Control