MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 85
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 1
Overview
This chapter provides an overview of the MPC561/MPC563 microcontrollers, including a block diagram
showing the major modular components and sections that list the major features, and differences between
the MPC561/MPC563 and the MPC555. The MPC561, MPC562, MPC563, and MPC564 devices are
members of the Freescale MPC500 RISC Microcontroller family. The parts herein will be referred to only
as MPC561/MPC563 unless specific parts need to be referenced.
1.1
The MPC561/MPC563 devices offer the following features:
Freescale Semiconductor
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PowerPC ISA-compliant 32-bit single issue RISC processor (RCPU)
64-bit floating-point unit (FPU)
Unified system integration unit (USIU) with a flexible memory controller and enhanced interrupt
controller (EIC)
512-Kbytes of Flash EEPROM memory (available on the MPC563 only)
— Typical endurance of 100,000 write/erase cycles @ 25ºC
— Typical data retention of 100 years @ 25ºC
32-Kbytes of static RAM in one CALRAM module, configured as
— 28-Kbyte normal access only array
— 4-Kbyte normal access or overlay access array (eight 512-byte regions)
Two time processing units (TPU3) with one 8-Kbyte dual port TPU RAM (DPTRAM)
One 22-timer channel modular I/O system (MIOS14)
Three TouCAN modules (TouCAN)
Two enhanced queued analog systems (QADC64E)
One queued serial multi-channel module (QSMCM), which contains one queued serial peripheral
interface (QSPI) and two serial controller interfaces (SCI/UART)
One peripheral pin multiplexing module (PPM) with a parallel to serial driver
Introduction
MPC561
MPC562
MPC563
MPC564
Device
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 1-1. MPC56x Family Features
512-Kbytes Flash
512-Kbytes Flash
Flash
None
None
Code Compression
Not Supported
Not Supported
Supported
Supported
1-1
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