MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 339

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

8.11.4
This register contains control bits for enabling or disabling the IRAMSTBY supply detection circuit. There
are also four bits that indicate the failure detection. All four bits have the same function and are required
to improve the detection capability in extreme cases.
Freescale Semiconductor
U = Unaffected by reset
1
1
PORESET
This bit is reserved on mask sets which implement bit 7 (ZOREG)
Removed on all parts that have the ZOREG bit.
Bits
8:15
1:4
0
5
6
7
Field
Addr
IRAMSTBY Control Register (VSRMCR)
MSB
ZOREG
VSRDE
—
LVDRS
LVSRS
0
Name
—
—
1
2
1
Reserved
Loss of IRAMSTBY sticky. These status bits indicate whether a IRAMSTBY supply failure
occurred. In addition, when the power is turned on for the first time, IRAMSTBY rises and
these bits are set. The LVSRS bits are cleared by writing them to ones. A write of zero has
no effect on these bits.
0 No IRAMSTBY supply failure was detected
1 IRAMSTBY supply failure was detected
IRAMSTBY detector disable.
0 IRAMSTBY detection circuit is enabled
1 IRAMSTBY detection circuit is disabled
Loss of IRAMSTBY for DECRAM Sticky — The status bit, dedicated especially for the BBC
DECRAM, which indicates if there was IRAMSTBY supply failure. When the power is turned
on for the first time, IRAMSTBY rises also and the bits will be asserted. The LVDECRAM bit
can be cleared by writing ones to LVDECRAM. A write of zero has no effect on this bit. The
bit may be used by application software, to decide if there is need to load decompression
vocabularies during reset routine.
0 IRAMSTBY supply failure was not detected
1 IRAMSTBY supply failure was detected
NOTE: The LVDRS bit is provided as a convenience for indicating that the DECRAM has lost
power. It requires that the IRAMSTBY pins are connected to the same power supply. It
actually only monitors the IRAMSTBY supply.
This bit indicates the status of the internal IRAMSTBY supply. This bit is cleared by writing
a 1 to it.
0 Internal IRAMSTBY zener regulator has not gone out of regulation
1 Internal IRAMSTBY zener regulator has gone out of regulation.
Note: ZOREG may get set inadvertently if IRAMSTBY is not supplied with at least 150µA.
Reserved
Unaffected
2
LVSRS
Figure 8-19. IRAMSTBY Control Register (VSRMCR)
MPC561/MPC563 Reference Manual, Rev. 1.2
3
Table 8-13. VSRMCR Bit Descriptions
4
VSRDE
0
5
1
LVDRS ZOREG
0x2F C290
U
6
Description
7
8
9
0_0000_0000
10
11
—
Clocks and Power Control
12
13
14
LSB
15
8-37