MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 530

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

QADC64E Legacy Mode Operation
13.7
The QADC64E requires accurate, noise-free input signals for proper operation. This section discusses the
design of external circuitry to maximize QADC64E performance.
The QADC64E uses the external signals shown in
be used as general-purpose digital input signals, 8 of which can be configured as either digital input or
output signals.
13.7.1
The 16 port signals on the QADC64E module can be used as analog inputs. Port A signals can be
configured as digital input or digital output signals and Port B signals can be used as 8-bit digital input
signals.
Port A signals are referred to as PQA[7:0] when used as a bidirectional 8-bit digital input/output port.
These eight signals may be used for general-purpose digital input signals or push-pull digital output
signals. Port B signals are referred to as PQB[7:0] when used as digital input signals.
Port A and B signals are connected to a digital input synchronizer during reads and may be used as general
purpose digital inputs when the applied voltages meet high voltage input (V
requirements. Refer to
requirements.
13-66
Trig1
(gate)
EOC
QS
Q1 RES
CF1
TOR1
CWPQ1
CWP
QADC64E Integration Requirements
Port Digital Input/Output Signals
LAST
0
Appendix F, “Electrical
LAST
CCW0
XX
Figure 13-48. Gated Mode, Continuous Scan Timing
8
MPC561/MPC563 Reference Manual, Rev. 1.2
CCW0
CCW1
R0
CCW1
R1
CCW2
Characteristics,” for more information on voltage
Figure
CCW3
CCW2
R2
13-1. There are 16 channel signals that can also
Q restart
CCW3
CCW0
R3
IH
) and low voltage input (V
CCW2
CCW3
R2
Freescale Semiconductor
Q restart
CCW3
CCW0
R3
IL
)