MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1045

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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RCPU development access can be achieved either via the READI signals or the BDM signals on the MCU.
The access method is determined during READI module configuration.
and BDM signals are multiplexed for RCPU development access.
When the READI module is configured for RCPU development access, IEEE-ISTO 5001 compliant
vendor-defined messages are used for transmission of data in and out of the MCU.
24.14.1 RCPU Development Access Messaging
The following RCPU development access messages are used for handshaking between the device and the
tool — DSDI data message, DSDO data message, and BDM status message.
24.14.1.1 DSDI Message
The DSDI message is used by the tool to download information to the RCPU.
Freescale Semiconductor
USIU
Figure 24-78. RCPU Development Access Multiplexing between READI and BDM Signals
Development
Access
RCPU
On the MPC561/MPC563 the BDM signals are shared with the READI
signals. Therefore BDM access is limited to access via the Nexus
vendor-defined development support messages.
Multiplexer
Debug
MPC561/MPC563 Reference Manual, Rev. 1.2
READI
JTAG
NOTE
.
.
. .
.
.
TCK / DSCK / MCKI
TDO / DSDO / MDO0
TDI / DSDI / MDI0
Figure 24-78
shows how READI
BDM
signals
READI Module
24-77

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