MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 468

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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0x30 4C00
0x30 4C02
0x30 4C04
0x30 4C06
0x30 4C08
0x30 4C0A EMU
0x30 4C0C CIE1
0x30 4C0E CIE2
0x30 4C10
0x30 4C12
0x30
4C14-
0x30 4DFF
0x30
4E00-
0x30 4E7F
0x30
4E80-
0x30 4EFF
0x30 4F00-
0x30 4F7F
0x30 4F80
0x30 4FFF
QADC64E Legacy Mode Operation
Accesses to supervisor-only data space is permitted only when the bus master is operating in supervisor
access mode. Assignable data space can be either restricted to supervisor-only access or unrestricted to
both supervisor and user data space addresses. See
Space.”
13.2.3
The QADC64E modules can be configured to operate in legacy or enhanced mode. Legacy mode is the
default state out of reset. Configuring bits in the QADC64E module configuration register enables
13-4
Address
1
Registers are accessible only as supervisor data space
SIGN
STO
CF1
MSB
Legacy and Enhanced Modes of Operation
P
X
0
TEST MODE
FRZ
PF1
PIE
PIE
1
2
1
IRL1
SSE
SSE
CF2
1
2
2
0000 00
UNSIGNED LEFT JUSTIFIED
TRG
PF2
PORTQA
3
DDRQA
SIGNED LEFT JUSTIFIED
MPC561/MPC563 Reference Manual, Rev. 1.2
TOR
Table 13-2. QADC64E_B Address Map
1
CWPQ1
4
MQ1
MQ2
TOR
2
5
LOC
K
P
6
Section 13.3.1.4, “Supervisor/Unrestricted Address
BYP
IRL2
FLI
P
7
UNSIGNED RIGHT JUSTIFIED
QS
RESUM
SUPV
E
8
IST
PSH
9
10
PORTQB
11
BQ2
CWPQ2
00 0000
PS
00 0000
12
A
CHAN
CWP
13
Freescale Semiconductor
PSL
14
LSB
15
Port Direction
Reserved
Interrupt
Port Data
Register
Control 0
Control 1
Control 2
Config.
Status 0
Status 1
Results
Results
Results
Module
CCWs
Test
1
1
1

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