MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1003
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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HRESET
(Tool drives)
RSTI
(Tool drives)
MSEO
EVTI
(Tool drives)
MDO
MSEI
MDI
Device sends out
DID message after
negation of RSTI
Tool sends in DC message with
desired program trace mode enabled.
(BDM can also be enabled through.
DC register configuration. See note.)
Do not send an input message
until at least 2 MCKI after READI is
enabled, or wait until the DID message
is received from the READI module.
NOTE:
If background debug mode (BDM) is enabled,
the ICTRL register cannot be modified through
user program. This register can only be accessed
through the development port.
1
EVTI must be asserted
4 system clocks prior to the
READI module.
negation of RSTI to enable
2
MPC561/MPC563 Reference Manual, Rev. 1.2
DID Message
TCODE=1
3
DC Message
TCODE=18
After the HRESET negation,
the device will start executing
the reset instruction sequence
user program. In this user program,
set the ISCTL field = 0b01 in the
ICTRL register. Also the USIU
should be programmed to ignore
instruction showcycles to avoid
impacting U-bus performance.
Device Ready
TCODE=16
4
16 clocks after receiving
Tool negates HRESET
device ready message.
READI Module
24-35
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