MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1014
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MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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READI Module
The total instruction count can be found by adding 256 for each program trace full message received to the
sequence count of the direct or indirect branch trace message that follows the resource full message. The
program trace full message has the following format:
At this time, the program trace sequential count full code is the only defined option for this message.
24.8.2.5
Branch trace error messages are explained within applicable functional areas, such as data trace,
watchpoint, and program trace sections of this chapter.
24.8.2.6
The relative address feature is compliant with the IEEE-ISTO 5001 - 1999 recommendations, and is
designed to reduce the number of bits transmitted for addresses of indirect branch messages.
The address transmitted is relative to the address of the previous branch trace message. It is generated by
XORing the new address with the previous address, and then using only the results up to the most
significant ‘1’ in the result. To recreate this address, an XOR of the (most-significant 0-padded) message
address with the previously decoded address gives the current address.
address is generated and how it can be used to recreate the original address.
24-46
Error Messages
Relative Addressing
Error Code
0001-1111
0000
Figure 24-32. Program Trace Full Message Format
[6 bits]
MPC561/MPC563 Reference Manual, Rev. 1.2
TCODE (27)
Program Trace Sequential Count Full
Vendor Defined or Reserved
Table 24-29. Resource Codes
Max Length = 10 bits
Min Length = 7 bits
[1 - 8 bits]
Resource Code
Description
Figure 24-33
shows how a relative
Freescale Semiconductor
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