MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 21

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

16.3.1.1
16.3.1.2
16.3.1.3
16.3.1.4
16.3.1.5
16.3.1.6
16.3.2
16.3.3
16.3.3.1
16.3.4
16.3.5
16.4
16.4.1
16.4.2
16.4.3
16.4.3.1
16.4.3.2
16.4.4
16.4.4.1
16.4.4.2
16.4.5
16.4.6
16.5
16.5.1
16.5.2
16.5.3
16.6
16.7
16.7.1
16.7.2
16.7.3
16.7.4
16.7.5
16.7.6
16.7.7
16.7.8
16.7.9
16.7.10
16.7.11
16.7.12
16.7.13
Freescale Semiconductor
Paragraph
Number
TouCAN Operation ..................................................................................................... 16-12
Special Operating Modes ............................................................................................ 16-17
Interrupts ..................................................................................................................... 16-20
Programming Model ................................................................................................... 16-21
Receive Mask Registers ............................................................................................ 16-7
Bit Timing ................................................................................................................. 16-8
Error Counters ......................................................................................................... 16-10
Time Stamp ............................................................................................................. 16-12
TouCAN Reset ........................................................................................................ 16-12
TouCAN Initialization ............................................................................................ 16-13
Transmit Process ..................................................................................................... 16-13
Receive Process ...................................................................................................... 16-14
Remote Frames ....................................................................................................... 16-17
Overload Frames ..................................................................................................... 16-17
Debug Mode ........................................................................................................... 16-17
Low-Power Stop Mode ........................................................................................... 16-18
Auto Power Save Mode .......................................................................................... 16-19
TouCAN Module Configuration Register (CANMCR) ......................................... 16-25
TouCAN Test Configuration Register .................................................................... 16-27
TouCAN Interrupt Configuration Register (CANICR) .......................................... 16-27
Control Register 0 (CANCTRL0) ........................................................................... 16-27
Control Register 1 (CANCTRL1) ........................................................................... 16-28
Prescaler Divide Register (PRESDIV) ................................................................... 16-29
Control Register 2 (CANCTRL2) ........................................................................... 16-30
Free Running Timer (TIMER) ................................................................................ 16-31
Receive Global Mask Registers (RXGMSKHI, RXGMSKLO) ............................ 16-31
Receive Buffer 14 Mask Registers (RX14MSKHI, RX14MSKLO) ...................... 16-32
Receive Buffer 15 Mask Registers (RX15MSKHI, RX15MSKLO) ...................... 16-33
Error and Status Register (ESTAT) ........................................................................ 16-33
Interrupt Mask Register (IMASK) .......................................................................... 16-35
Common Fields for Extended and Standard Format Frames ................................ 16-4
Fields for Extended Format Frames ..................................................................... 16-6
Fields for Standard Format Frames ...................................................................... 16-6
Serial Message Buffers ......................................................................................... 16-6
Message Buffer Activation/Deactivation Mechanism .......................................... 16-7
Message Buffer Lock/Release/Busy Mechanism ................................................. 16-7
Configuring the TouCAN Bit Timing ................................................................ 16-10
Transmit Message Buffer Deactivation .............................................................. 16-14
Reception of Transmitted Frames ....................................................................... 16-14
Receive Message Buffer Deactivation ................................................................ 16-16
Locking and Releasing Message Buffers ........................................................... 16-16
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
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