MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 709

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

The user should prepare or change a message buffer for frame reception by executing the following steps.
Once these steps are performed, the message buffer functions as an active receive buffer and participates
in the internal matching process, which takes place every time the TouCAN receives an error-free frame.
In this process, all active receive buffers compare their ID value to the newly received one. If a match is
detected, the following actions occur:
The user should read a received frame from its message buffer in the following order:
If the free running timer is not read, that message buffer remains locked until the read process starts for
another message buffer. Only a single message buffer is locked at a time. When a received message is read,
the only mandatory read operation is that of the control/status word. This ensures data coherency.
If the BUSY bit is set in the message buffer code, the CPU should defer accessing that buffer until this bit
is negated. Refer to
Because the received identifier field is always stored in the matching receive message buffer, the contents
of the identifier field in a receive message buffer may change if one or more of the ID bits are masked.
Freescale Semiconductor
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1. Write the control/status word to hold the receive buffer inactive (code = 0b0000)
2. Write the ID_HIGH and ID_LOW words
3. Write the control/status word to mark the receive message buffer as active and empty
1. The frame is transferred to the first (lowest entry) matching receive message buffer
2. The value of the free-running timer (captured at the beginning of the identifier field on the CAN
3. The ID field, data field, and Rx length field are stored
4. The code field is updated
5. The status flag is set in the IFLAG register
1. Control/status word (mandatory, as it activates the internal lock for this buffer)
2. ID (optional, since it is needed only if a mask was used)
3. Data field word(s)
4. Free-running timer (optional, as it releases the internal lock)
The user configures the message buffers for reception
The TouCAN transfers received messages from the serial message buffers to the receive message
buffers with matching IDs
The user retrieves these messages
bus) is written into the time stamp field in the message buffer
Steps 1 and 3 are mandatory for data coherency.
The user should check the status of a message buffer by reading the status
flag in the IFLAG register and not by reading the control/status word code
field for that message buffer. This prevents the buffer from being locked
inadvertently.
Table
16-2.
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
NOTE
CAN 2.0B Controller Module
16-15