MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 344
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MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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External Bus Interface
9-4
.
Reservation transfer
Program trace
Signal Name
Burst transfer
Address type
Address bus
Transfer size
ADDR[8:31]
Read/write
TSIZ[0:1]
RD/WR
BURST
AT[0:3]
RSV
PTR
[8:31]
Pins
24
1
1
2
3
1
1
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 9-1. MPC561/MPC563 BIU Signals
Active
Address and Transfer Attributes
HIgh
High
High
High
High
Low
Low
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Specifies the physical address of the bus transaction.
Driven by an external bus master when it owns the
external bus. An input for testing purposes only.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Driven high
indicates that a read access is in progress. Driven low
indicates that a write access is in progress.
Driven by an external master when it owns the
external bus. Driven high indicates that a read access
is in progress. Driven low indicates that a write access
is in progress.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Driven low
indicates that a burst transfer is in progress. Driven
high indicates that the current transfer is not a burst.
Driven by an external master when it owns the
external bus. Driven low indicates that a burst transfer
is in progress. Driven high indicates that the current
transfer is not a burst. The MPC561/MPC563 does
not support burst accesses to internal slaves.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Specifies the
data transfer size for the transaction.
Driven by an external master when it owns the
external bus. Specifies the data transfer size for the
transaction.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Indicates
additional type on the current transaction.
Only for testing purposes.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Indicates
additional information about the address on the
current transaction.
Only for testing purposes.
Driven by the MPC561/MPC563 along with the
address when it owns the external bus. Indicates
additional information about the address on the
current transaction.
Only for testing purposes.
Description
Freescale Semiconductor
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