MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 608
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
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Quantity:
10 000
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QADC64E Enhanced Mode Operation
Each port A or B signal is configured as an input or output by programming the port data direction register
(DDRQA or DDRQB). The digital input signal states are read by the software in the upper half of the port
data register when the port data direction register specifies that the signals are inputs. The digital data in
the port data register is driven onto the port A or B signals when the corresponding bit in the port data
direction register specifies output. Refer to
Since the outputs are configured as push-pull drivers, external pull-up provisions are not necessary when
the output is used to drive another integrated circuit.
14.6.2
The QADC64E uses two external trigger signals (ETRIG[2:1]). Each of the two input external trigger
signals is associated with one of the scan queues, queue 1 or queue 2 The assignment of ETRIG[2:1] to a
queue is made in the QACR0 register by the TRG bit. When TRG=0, ETRIG1 triggers queue 1 and
ETRIG2 triggers queue 2. When TRG=1, ETRIG1 triggers queue 2 and ETRIG2 triggers queue 1.
14.6.3
V
power is required to isolate the sensitive analog circuitry from the normal levels of noise present on the
digital power supply. Refer to
The analog supply signals (V
V
14-66
DDA
RL
) and of the analog multiplexer inputs.
16 CHANNELS
and V
External Trigger Input Signals
Analog Power Signals
SSA
signals supply power to the analog subsystems of the QADC64E module. Dedicated
DDA
Figure 14-47. Equivalent Analog Input Circuitry
Appendix F, “Electrical
MPC561/MPC563 Reference Manual, Rev. 1.2
and V
SSA
) define the limits of the analog reference voltages (V
Figure 14-47
C
Appendix B, “Internal Memory
SAMPLE
P
AMP
V
V
DDA
SSA
Characteristics,” for more information.
is a diagram of the analog input circuitry.
S/H
RC DAC
Comparator
V
RH
V
RL
QADC64E 16CH SAMPLE AMP
Map” for more information.
Freescale Semiconductor
RH
and
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