MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1393

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

A
Associated registers
B
BAR (breakpoint address register)
BBCMCR (BBC module configuration register)
BR0 - BR3 (emory controller base registers 0 -3)
Breakpoint counter B value and control register
(COUNTB)
C
CALRAM_OTR (CALRAM ownership trace register)
22-17
CANCTRL0 (control register 0)
CANCTRL1 (control register 1)
CANCTRL2 (control register 2)
CFSR0 (TPU3 channel function select register 0)
CFSR1 (TPU3 channel function select register 1)
CFSR2 (TPU3 channel function select register 2)
CFSR3 (TPU3 channel function select register 3)
CIER (TPU3 channel interrupt enable register)
CISR (TPU3 channel interrupt status register)
CMPA-CMPD (comparator A-D value registers)
CMPE-CMPF (comparator E-F value registers)
CMPG-CMPH (comparator G-H value registers)
COLIR (change of lock interrupt register)
COUNTA (breakpoint counter A value and control regis-
ter)
COUNTB (breakpoint counter B value and control regis-
ter)
CPR0 (TPU3 channel priority register 0)
CPR1 (TPU3 channel priority register 1)
CRAM_RBAx (CALRAM region base address register)
22-15
CRAMMCR (CALRAM module configuration register)
22-13
CRAMOVL (CALRAM overlay configuration register)
22-17
D
DDRQA (QADC64E port A data direction registers)
13-14
DDRQS (PORTQS data direction register)
DEC (decrementer register)
DER (debug enable register)
DMBR (dual mapping base register)
DPDR (development port data register)
DPTRAM
Freescale Semiconductor
23-45
23-46
,
,
,
22-18
22-16
14-14
23-46
10-4
6-40
23-43
16-27
16-28
16-30
23-53
10-36
MPC561/MPC563 Reference Manual, Rev. 1.2
23-53
19-18
19-18
8-36
15-14
19-19
Register Index
19-15
23-46
4-19
23-41
23-47
10-32
19-16
19-16
19-16
19-16
DSCR (TPU3 development support control register)
19-12
DSSR (TPU3 development support status register)
Dual mapping option register
E
ECR (exception cause register)
EIBADR (external interrupt relocation table base address
register)
EMCR (external master control register)
G
General-Purpose I/O registers
GPDI (general-purpose data in register)
GPDO (general-purpose data out register)
H
HSQR0 (TPU3 host sequence register 0)
HSQR1 (TPU3 host sequence register 1)
HSSR0 (TPU3 host service request register 0)
HSSR1 (TPU3 host service request register 1)
I
ICTRL (I-bus support control register)
IMASK (interrupt mask register)
Internal memory map register
K
Keep alive power registers lock mechanism
L
L2U
L2U_GRA (L2U global region attribute register)
L2U_MCR (L2U module configuration register)
L2U_RAx (L2U region X attribute register)
L2U_RBAx (L2U region x base address register)
LCTRL1 (L-bus support control register 1)
LCTRL1 (L-bus support control register 2)
LCTRL2 (L-bus support control register 2)
M
MBISM
MCPSMCR (MCPSM status/control register)
MDASMSCR (MDASM status/control register)
MI_GRA (global regionattribute register)
module configuration register (DPTMCR)
ram base address register (RAMBAR)
global region attribute register (L2U_GRA)
module configuration register (L2U_MCR)
region attribute registers (L2U_RAx)
region base address registers (L2U_RBAx)
interrupt registers
4-25
17-69
10-37
6-28
6-46
23-41
16-35
,
23-51
23-42
18-19
6-29
19-17
19-17
4-23
11-15
18-18
20-4
23-47
23-48
23-48
8-25
11-15
,
17-18
19-17
19-17
RegIndex-1
20-3
A-16
11-14
11-13
17-43
11-16
11-14
11-16
11-14
19-14