MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1397

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
MIOS14RPR0 request pending register
MIOS14RPR1 request pending register
MIOS14SR0 interrupt status register
MIOS14SR1interrupt status register
MIOS14TPCR (test and pin control register)
MISCNT (MISC counter)
MMCSMCNT (MMCSM up-counter register)
MMCSMMML (MMCSM modulus latch register)
MMCSMSCR
MPIOSMDDR (MPIOSM data direction register)
MPIOSMDR (MPIOSM data register)
MPWMCNTR (MPWMSM counter register)
MPWMPERR (MPWMSM period register)
MPWMPULR (MPWMSM pulse width register)
MPWMSCR (MPWMSM status/control register)
MSTAT (memory controller status registers)
OR0 - OR3 (memory controller option registers 0-3)
PDMCR (pads module configuration register)
PDMCR2 (pads module configuration register)
PISCR (periodic interrupt status and control register)
PITC (periodic interrupt timer count register)
PITR (periodic interrupt timer register)
PLPRCR (PLL, low-power, and reset-control register)
Port data direction registers
Port data registers
PPMMCR (module confguration register)
PPMPCR (PPM control register)
QACR0 (QADC64E control register 0)
QACR1 (QADC64E control register 1)
QACR2 (QADC64E control register 2)
QADCINT (QADC64E interrupt register)
QADCMCR (module configuration register)
QASR (status register 0)
QASR (status registers)
QSMCM
configuration register (QMCMMCR)
interrupt level registers (QDSCI_IL, QSPI_IL)
port QS data register (PORTQS)
17-14
17-24
17-24
17-63
17-57
17-58
10-34
6-44
8-33
14-14
14-16
14-18
14-11
15-9
(MMCSMstatus/control
13-13
13-20
14-22
,
20-6
14-12
13-14
18-12
MPC561/MPC563 Reference Manual, Rev. 1.2
,
14-13
17-67
17-65
15-11
17-62
6-45
17-66
17-68
18-10
15-8
,
17-57
14-8
10-32
24-8
register)
17-58
6-45
17-13
13-14
13-15
13-17
13-12
2-22
17-23
2-23
,
,
,
,
,
RCPU
PORTQS data direction register (DDRQS)
PORTQS pin assignment register (PQSPAR)
QSCI1 control register (QSCI1CR)
QSCI1 status register (QSCI1SR)
QSPI command RAM (CRx)
QSPI control register 0 (SPCR0)
QSPI control register 1 (SPCR1)
QSPI control register 2 (SPCR2)
QSPI control register 3 (SPCR3)
QSPI registers
QSPI status register (SPSR)
queued SCI1 status and control registers
SCI control register 0 (SCCxR0)
SCI control register 1 (SCCxR1)
SCI data register (SCxDR)
SCI registers
SCI status register (SCxSR)
test register (QTEST)
additional
condition register (CR)
condition register CR0 field definition
condition register CR1 field definition
condition register crn field - compare instruction
count register (CTR)
dae/source instruction service register (DSISR)
data address register (DAR)
decrementer register (DEC)
EIE, EID, and NRI special-purpose registers
floating-point exception cause register (FPECR)
floating-point registers (FPRs)
floating-point status and control register (FPSCR)
general
general-purpose registers (GPRs)
implementation-specific special-purpose registers
integer exception register (XER)
link register (LR)
machine state register (MSR)
machine status save/restore register 0 (SRR0)
machine status save/restore register 1 (SRR1)
15-13
15-12
3-27
3-17
3-22
3-25
3-26
3-13
(SPRG0-SPRG3)
3-25
3-23
3-23
implementation-specific
15-45
15-16
special-purpose
3-19
3-19
15-9
3-16
3-24
15-50
3-23
15-21
15-48
3-23
15-23
3-20
3-12
15-17
15-19
15-20
15-20
15-46
15-47
3-18
3-12
15-61
15-60
RegIndex-5
3-17
3-17
15-59
registers
registers