MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 48

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

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Figure
Number
CCW Priority Situation 4...................................................................................................... 14-56
CCW Priority Situation 5...................................................................................................... 14-57
CCW Priority Situation 6...................................................................................................... 14-57
CCW Priority Situation 7...................................................................................................... 14-58
CCW Priority Situation 8...................................................................................................... 14-58
CCW Priority Situation 9...................................................................................................... 14-59
CCW Priority Situation 10.................................................................................................... 14-59
CCW Priority Situation 11.................................................................................................... 14-60
CCW Freeze Situation 12 ..................................................................................................... 14-60
CCW Freeze Situation 13 ..................................................................................................... 14-61
CCW Freeze Situation 14 ..................................................................................................... 14-61
CCW Freeze Situation 15 ..................................................................................................... 14-61
CCW Freeze Situation 16 ..................................................................................................... 14-61
CCW Freeze Situation 17 ..................................................................................................... 14-62
CCW Freeze Situation 18 ..................................................................................................... 14-62
CCW Freeze Situation 19 ..................................................................................................... 14-62
External Trigger Mode (Positive Edge) Timing with Pause................................................. 14-63
Gated Mode, Single-Scan Timing ........................................................................................ 14-64
Gated Mode, Continuous Scan Timing................................................................................. 14-65
Equivalent Analog Input Circuitry ....................................................................................... 14-66
Errors Resulting from Clipping ............................................................................................ 14-67
Star-Ground at the Point of Power Supply Origin ................................................................ 14-69
Electrical Model of an A/D Input Signal .............................................................................. 14-71
External Multiplexing of Analog Signal Sources ................................................................. 14-72
Input Signal Subjected to Negative Stress ............................................................................ 14-74
Input Signal Subjected to Positive Stress ............................................................................. 14-75
QSMCM Block Diagram ........................................................................................................ 15-2
QSMCM Interrupt Levels ....................................................................................................... 15-7
Interrupt Hardware Block Diagram ........................................................................................ 15-8
QSMCM Configuration Register (QSMCMMCR) ................................................................ 15-8
QSM2 Dual SCI Interrupt Level Register (QDSCI_IL) ......................................................... 15-9
QSPI_IL — QSPI Interrupt Level Register .......................................................................... 15-10
PORTQS — Port QS Data Register ..................................................................................... 15-12
PORTQS Pin Assignment Register (PQSPAR).................................................................... 15-13
PORTQS Data Direction Register (DDRQS) ....................................................................... 15-14
QSPI Block Diagram ............................................................................................................ 15-15
QSPI Control Register 0 (SPCR0)........................................................................................ 15-17
SPCR1 — QSPI Control Register ........................................................................................ 15-19
SPCR2 — QSPI Control Register 2 ..................................................................................... 15-20
SPCR3 — QSPI Control Register 3 ..................................................................................... 15-21
MPC561/MPC563 Reference Manual, Rev. 1.2
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Freescale Semiconductor
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