MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 136
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Signal Descriptions
2-38
Signal List
ENGCLK
QGPIO[1:3]
EXTCLK
CLKOUT
DSDO
PCS[1:3]/
JCOMP /
EXTAL
QGPIO0
QGPIO4
QGPIO5
QGPIO6
MDO0
QGPO1
TDO
XTAL
BUCLK
PCS0 /
MISO /
MOSI /
TXD1 /
SCK /
RSTI
XFC
SS /
7
11
7
11
/
7
11
3
/
7
1
/
2.6 V / 5 V
Voltage
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MPC561/MPC563 Reference Manual, Rev. 1.2
No
No
No
No
No
No
200 ; 50
200 ; 50
200 ; 50
200 ; 50
200 ; 50
200 ; 50
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
NA ; NA
50 ; 25
50 ; 25
50 ; 25
90; 50;
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
Drive
Load
(pF)
25
NA
NA
15
Clocks and PLL
2
5
5
5
5
5
5
QSMCM
PU2.6 until reset
negates or the
driver is enabled
PD until SPRDS
is set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
PU5 until
PULL_DIS1 is
set
Reset State
—
—
—
—
—
—
—
Hysteresi
Enabled?
NA
NA
NA
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
s
DSDO unless the Nexus
(READI) port (MDO0) or
JTAG mode (TDO) is enabled.
See
See
XTAL
EXTAL
XFC
CLKOUT
EXTCLK
ENGCLK (2.6 V)
QGPO0
QGPIO[1:3]
QGPIO4
QGPIO5
QGPIO6
QGPO1
Function After HRESET,
Section
Section
PORESET/TRST
Freescale Semiconductor
2.5.
2.5.
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