MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 90

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Overview
1.3.1.7
1.3.1.8
1.3.2
1.3.3
1.3.3.1
1.3.3.2
1-6
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Composed of one 32-Kbyte CALRAM module
— 28-Kbyte static RAM
— 4-Kbyte calibration (overlay) RAM feature that allows calibration of Flash-based constants
Eight 512-byte overlay regions
One clock fast accesses
Two clock cycle access option for power saving
Standby power supply (IRAMSTBY) for data retention
24 address signals and 32 data signals can be used for general-purpose I/O in single-chip mode
16 GPIO in MIOS14
Many peripheral signals can be used as GPIO when not used as primary functions
5-V outputs with slew rate control
Compliant with Class 3 of the IEEE-ISTO 5001-1999
Program trace via branch trace messaging (BTM)
Data trace via data write messaging (DWM) and data read messaging (DRM)
Ownership trace via ownership trace messaging (OTM)
Run-time access to on-chip memory map and special-purpose registers (SPRs) via the READI
read/write access protocol
Watchpoint messaging via the auxiliary port
9 or 16 full-duplex auxiliary pin interface for medium and high visibility throughput
All features configurable and controllable via the auxiliary port
Supports the RCPU debug mode via the auxiliary port
True 5 V I/O
Two time processing units (TPU3) with 16 channels each
Each TPU3 is a micro-coded timer subsystem
8 Kbytes of dual port TPU RAM (DPTRAM) shared by two TPU3 modules for TPU micro-code
Six modulus counter sub-modules (MCSM)
10 double-action sub-modules (DASM)
Nexus Debug Port (Class 3)
Integrated I/O System
32-Kbyte Static RAM (CALRAM)
General Purpose I/O Support (GPIO)
Two Time Processor Units (TPU3)
22-Channel Modular I/O System (MIOS14)
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor