MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 238

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Unified System Interface Unit (USIU) Overview
5.1.1
Table 5-2
reside in an alternate internal memory space that can only be accessed with the mtspr and mfspr
instructions, or from an external master (refer to
registers are 32 bits wide.
5-6
1
0x2F C330–0x2F C33C Reserved
0x2F C348–0x2F C37C Reserved
16-bit register.
0x2F C38C–0x2F
lists the MPC561/MPC563 special purpose registers (SPR) used by the USIU. These registers
0x2F C32C
0x2F C320
0x2F C324
0x2F C328
0x2F C340
0x2F C344
0x2F C380
0x2F C384
0x2F C388
Address
USIU Special-Purpose Registers
C3FC
RCPU special purpose registers cannot be accessed by an external master.
Only SPRs in the USIU can be accessed by an external master.
Real-Time Clock Status and Control Key (RTCSCK)
See
See
Real-Time Alarm Seconds Key (RTSECK)
See
See
PIT Status and Control Key (PISCRIK)
See
PIT Count Key (PITCK)
See
System Clock Control Key (SCCRK)
See
PLL Low-Power and Reset Control Register Key (PLPRCRK)
See
Reset Status Register Key (RSRK)
See
Reserved
Real-Time Clock Key (RTCK)
Real-Time Alarm Key (RTCALK)
Table 8-8
Table 8-8
Table 8-8
Table 8-8
Table 8-8
Table 8-8
Table 8-8
Table 8-8
Table 8-8
Table 5-1. USIU Address Map (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Clocks and Reset Keys
Section 6.1.2, “External Master
NOTE
Register
Modes,” for details). All
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