MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 895

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

21.3.11.4 Switching The UC3F EEPROM Censorship
There are three states of censorship that CENSOR[0:1] can select. These are—cleared censorship, no
censorship (two states) and information censorship. These three states, state values, transitions, and state
of censorship are shown in
Freescale Semiconductor
5. Read the UC3FCTL register until HVS = 0.
6. Read the UC3FCTL register. Confirm PEGOOD = 1.
7. Write EHV = 0 in the UC3FCTL register.
8. Write SES = 0 and CSC = 0.
T4
Information Censorship
The values of the EPEE and B0EPEE inputs are latched with the assertion
of EHV to determine the array protection state for the clear censor
operation. It is assumed that the EPEE and B0EPEE inputs are setup prior
to the assertion of EHV. If EPEE and B0EPEE are not enabled for erase, the
CENSOR[0:1] bits may not be cleared.
Cleared Censorship
No Censorship
Figure
Figure 21-11. Censorship States and Transitions
MPC561/MPC563 Reference Manual, Rev. 1.2
21-11.
CENSOR[0:1] = 01
T3
Data
Data
Unknown
NOTE
CENSOR[0:1] = 11
CENSOR[0:1] = 00
Data
Data
Data
T2
T1
CENSOR[0:1] = 10
T3
Data
Data
CDR3 Flash (UC3F) EEPROM
T3
21-33