MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 190

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Central Processing Unit
Execution begins at physical address 0x0100 if the hard reset configuration word IP bit is cleared to 0.
Execution begins at physical address 0xFFF0 0100 if the hard reset configuration word IP bit is set to 1.
3.15.4.2
A machine-check exception is assumed to be caused by one of the following conditions:
3-46
1
•
•
•
If the RCPU is in decompression on mode, SRR0 will contain a compressed address.
Machine State Register (MSR)
The accessed address does not exist.
A data error was detected.
A storage protection violation was detected by chip-select logic.
Register Name
Machine Check Exception (0x0200)
Table 3-23. Register Settings following an NMI (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
DCMPEN
Other
Bits
ME
LE
IP
No change
Bit is copied from ILE
This bit is set according to (BBCMCR[EN_COMP] AND
BBCMCR[EXC_COMP])
No change
Cleared to 0
Description
Freescale Semiconductor