MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1406

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Fetch serialized 23-1
FEX bit 3-14
FI 3-15
Final sample time 13-35
Floating-point
FORMERR 16-34
FP bit 3-21
FPECR 3-26
FPRF 3-15
FPRs 3-12
FPSCK 19-20
FPSCR 3-13
FPU 3-5
FPUVE 23-42
FPUVEE 23-44
F
FQD D-35
FQM D-10
FR 3-15
Frame
Index-6
QCLK
bus interface, 9-1
available 3-21
enabled exception summary 3-14
exception mode 3-21
exception summary 3-14
fraction inexact 3-15
fraction rounded 3-15
inexact exception 3-14
invalid operation exception
invalid operation exception for invalid integer
invalid operation exception for invalid square root 3-15
invalid operation exception for software request 3-15
overflow exception 3-14
registers 3-12
result flags 3-15
rounding control 3-16
status and control register 3-13
underflow exception 3-14
unit 3-5
zero divide exception 3-14
size 15-58
enable 3-15
enable 3-15
for ×*0 3-14
for ×/× 3-14
for ×-× 3-14
for 0/0 3-14
for invalid compare 3-15
for SNaN 3-14
summary 3-14
enable 3-15
convert 3-15
13-47
,
14-48
,
,
3-22
14-36
,
3-15
MPC561/MPC563 Reference Manual, Rev. 1.2
Frames
Framing error (FE) flag 15-50
FREEZ ACK 16-18
FREEZE
Freeze
FREEZE (internal signal) 13-10
freeze operation 6-23
Frequency measurement (FQM) D-10
FRZ 13-8
FRZACK 16-13
FULL
Function
FX bit 3-14
G
general purpose chip-select machine 10-3
General SPRs 3-24
General-purpose registers (GPRs) 3-12
Global registers 13-7
GPCM 10-3
H
Hall effect decode (HALLD) D-20
HALLD D-20
HALT 15-21
Halt
HALTA 15-22
HALTA and MODF Interrupt Enable (HMIE) 15-42
HALTA/MODF interrupt enable (HMIE) bit 15-21
Hang on T4 (HOT4) 19-12
hard reset 7-2
hard reset configuration word (RCW) 7-11
HMIE 15-21
HOT4 19-12
HRESET 7-2
HSQR 19-16
HSSR 19-17
I
IBRK 23-43
overload 16-17
remote 16-17
assertion response (FRZ)
enable (FRZ) 13-8
mode 13-9
parameters D-12
receive message buffer code 16-5
library for TPU 19-4
acknowledge flag (HALTA) 15-22
QSPI (HALT) 15-21
QSM 15-6
TPU 19-13
,
14-8
,
16-13
,
16-13
,
14-8
,
19-13
,
,
23-29
15-57
,
Freescale Semiconductor
13-30
,
14-9
,
14-31