MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 202

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Central Processing Unit
Execution resumes at offset 0x1300 from the base address indicated by MSR[IP].
3.15.4.15 Implementation-Specific Data Protection Error Exception (0x1400)
The implementation-specific data protection error exception occurs in the following case:
3-58
1
If the exception occurs during an instruction fetch in Decompression On mode, the SRR0 register will contain an
indeterminate value.
The data access violates the storage protection and MSR[DR]=1. See
Interface
(L2U).”
MPC561/MPC563 Reference Manual, Rev. 1.2
Chapter 11, “L-Bus to U-Bus
Freescale Semiconductor

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